HD3SS460 / Schematic diagram Figure 8 and 11 of the datasheet

Masumi Saito

Other Parts Discussed in Thread: HD3SS460

In Figure8 and Figure11 of your datasheet(REVISED MARCH 2015), circuits connect inversely P/N on C*X and Ln* line.
Is it right? If yes, what is reason?

Regards

Saito

over 10 years ago

0 Brian Berner over 10 years ago

TI__Mastermind 30280 points

Saito-san,

I will loop in the HD3SS460 team to answer this question for you.

0 Diego Cortes over 10 years ago

TI__Mastermind 36085 points

Hello,

Both diagrams are fine, as you can see in the figures 8 and 11, the input and output DP lanes are swapped, this leads to have the same polarity in both sides of the device, meanwhile the SS lanes are only swapped on one side, which is allowed by the USB3 spec, therefore both connection are OK for the implementation.

Regards,

Diego.

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HD3SS460 / Schematic diagram Figure 8 and 11 of the datasheet