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DP83640 central tap pull-up and Ground connection?

Other Parts Discussed in Thread: DP83640

Hello, 

First question:

I got the following message from thread "DP83640 - Surge immunity test LV3"

<Question1>
Why is "CENTER TAP IS PULLED TO VDD" required?
-It means TP-: GND, TD+ :+6.6V.
-Wtih CENTER TAP conneting to +3.3V, it is possible to remain equilibrium state of the pulse-trans.

Center tap is pulled to VDD since the driver we use is a current mode driver. If it were a voltage mode driver we would have center tap to GND. Since the transformer isolated the ground planes between the link partners, we can use either type.

What does "we can use either type" ? Does it mean we can either pullup centre tap, or leave it to GND via caps? Is DP83640 a current mode driver or voltage mode driver? Or both, automatically changed?

The reason I asked about this is voltage mode driver has balanced architecture lead to lower EMI emission, which is my consideration in my design. But in the datasheet, pull-up central tap is recommended. I'm not sure which way should I go.

Second question:

Do I need to separate analog ground(ANAVSS, CD_VSS) from digital ground(IO_CORE_VSS, IO_VSS)? I saw our current design connecting both analog and  digital ground to the same ground nets. Though it works, I don't think that is a good practice. Any recommendation on this?

Thanks

Yue

  • Yue,

    In the context of the previous post, I believe that "either type" means that the connection to the the center tap can change depending on the type of line driver implemented in the PHY. To be clear, the center tap is typically de-coupled to ground via a capacitor rather than shorted directly to ground.

    The DP83640 has a current mode line driver. Therefore, the center tap should be connected to the 3.3V supply and de-coupled to ground via a capacitor. The line driver for the DP83640 is well optimized and should not be a limitation in terms of radiated emissions. To help with your design, we have an application note on reducing radiated emissions (www.ti.com/.../snla107).

    Separating the analog and digital grounds constitutes best practice. If your board design can accommodate these connections, you can separate the grounds.

    Patrick