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TI DP83848J : Ethernet 10 & 100 Mpbs compliance test

Sridhar CR
Intellectual 260 points

Hi All,

I am currently working on Beagle Bone Black prototyped custom board which runs on TI SDK 8.0.

For this board, we need to perform Ethernet 100 and 10 Mbps Compliance tests. We are using TI DP83848J Ethernet PHY on our board.

We are referring to the Ethernet compliance tests (timing and measurement of electrical parameters) as mentioned in the link below:

http://www.av.it.pt/medidas/data/Manuais%20&%20Tutoriais/60%20-%20MSO71604C/Optional%20SW/Documents/ET3_Documentation/TDSET3.pdf

Please refer to the 10BASE-TX and 10BASE-T tests mentioned in pages 137, 138 in the above document.

Can somebody help provide a method to generate the signal patterns for these tests.

Looking forward for your help

Thanks,
Sridhar CR

  • 0
    TI__Mastermind 31600 points

    Sridhar,

    According to page 137 of the TDSET3 documentation, the only pattern required for 100Base-TX is scrambled idles.  The required configuration for this is:

    • Force 100Base-TX, full-duplex (write 0x2100 to register 0x00)

    According to page 138 of the TDSET3 documentation, for 10Base-T testing, three patterns are required.  The required register configurations for these patterns are:

    1. To output link pulses in 10Base-T:
      1. Force 10Base-T, full duplex (write 0x0100 to address 0x00)

    2. To output a Pseudo-random sequence in 10Base-T:
      1. Force 10Base-T, full duplex (write 0x0100 to address 0x00)
      2. Force 10Base-T good link and disable jabber (write 0x0845 to address 0x1A)
      3. Start BIST transmission of PSR9 pattern (write 0x1to bit 8 of address 0x19)

    3. To output all 1's (10MHz sine wave) in 10Mbps:
      1. Force 10Base-T, full duplex (write 0x0100 to address 0x00)
      2. Force 10Base-T good link and disable jabber (write 0x0845 to address 0x1A)
      3. Enable 10Base-T all 1's pattern (write 0x0013 to address 0x1B)

    I believe these should be all the configurations you need.  Please let me know if anything else is required.

    Patrick

  • 0 in reply to Patrick OFarrell
    Intellectual 260 points

    Patrick,

    Thank you for the information.

    I also wanted to know if there is any method to read/write the MDIO registers (that you mentioned above) directly from the userspace?

    Can I read/write these registers by accessing the MDIOUSERACCESS0/MDIOUSERACCESS1 registers from userspace?

    As per the AM335x TRM, section 14.4.4, 14.4.5, we can directly write, read PHY register. If this is so, can you please provide some sample application as how this is accomplished?

    Thanks,
    Sridhar CR

  • 0 in reply to Sridhar CR
    TI__Mastermind 31600 points
    Sridhar,

    I am not aware of a mechanism to access the PHY registers directly from userspace. I would suggest that you post this question to an AM335x forum.

    Patrick