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TFP401A ODCK output

Other Parts Discussed in Thread: TFP401A, TFP401

Below is the ODCK output from TFP401A. What is wrong with the pixel clock here? The clock signal is not proper from TFP. Tried 1280x720 as well as 1024x600 resolutions. Also attached the schematic. 

-Thanks

Mahen

TFP401A _SCH.pdf

  • Hello,

    What is the pixel clock frequency?
    Make sure the DVI transmitter is set to drive the data in the falling clock edge as the TFP401A is.
    This could also be an artifact of the oscilloscope, are you using some kind of "demo board" as the scope? What is the sample rate of the scope?

    Regards
  • Hello Elias,

    Thank you for quick response.

    Since input resolution is 1280x720 @ 60Hz, pixel clock must be 1280 * 720 * 60 = approx 55MHz. But from the oscilloscope measurement I see it varying from 2MHz to 50MHz. When it showed 50Mhz briefly the waveform looks OK. If you see the video frame by frame you will notice. Its Hantek 200MHz oscilloscope.

    If I connect ODCK from TFP401A evaluation board from adafruit the clock is perfect. With the same oscilloscope setup if we connect our board the clock is bad. changed the TFP401 IC as well. HDMI source tested was from PC and laptop with 1280x720 60hz resolution with audio output disabled; only hdmi video.

    Appreciate your support.

    -mahen

       

  • Hello,

    Have you tried with different clock frequencies?
    If the ODCK is varying it could be that the TFP401 is not detecting a valid HDMI signal, what is the state of SCDT?
    It is also probably you have an issue with the layout, can you share your schematic and layout for review?
    If you don't want to post them here you can provide an email address and I will contact you.
    Regards
  • Hi Elias, my email is  

    Please send me a mail. Will share the schematics and layout.

    Thanks

    m