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DS90UB913A The mode change from Internal oscillator mode to PCLK mode during I2C communication

Other Parts Discussed in Thread: DS90UB913A-Q1

Our customer has a question about DS90UB913A-Q1.
I'm posting the question for the customer:

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After DS90UB913A is powered on, host initializes an imager via I2C on 914-913.
During I2C communication the imager outputs PCLK to the Ser.
Then, the Ser changes from internal oscillator mode to PCLK mode.

We have some questions.

When the mode is changed, is the I2C communication between host and imager affected?

(We encountered that communication stops.)

When switching over to a PCLK mode, is the I2C communication prohibited ?
If yes, how long does the prohibited period need ?

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Thanks in advance.

Best regards,
Takishin

  • The communications channel for the FPD-III products is broken into the forward channel, and a reverse channel.  To implement I2C communication, the FPD-III products divide the I2C commands into forward direction and reverse direction communications, and treat each half separately, with one direction going on the forward channel along with the video data, and the other direction going on the back channel.

    If the serializer has no PCLK, then it will establish a forward channel link using it's internal clock, when a PCLK appears, then the serializer will switch over to using this PCLK, and this switch is very fast (1-2 ms).  At the receive side, the deserializer will lose lock, and then re-establish lock with the new clock.  The deserializer lock time is slower - up to 22ms.   It is possible that some I2C commands will be lost while the deserializer is reacquiring lock.  

    If writing a command which is liable to make a change to PCLK which will cause an unlock event, it would be best to then wait 22ms or longer before subsequent commands.

  • Hello,

    Thank you for your reply.
    It helps a lot.

    Best regards,
    Takishin