Dear Sirs
About TPS65982 configuration seting for Thunderbolt 3 application,
How to build TPS65982 SPI flash binary for Thunderbolt 3 application (for the following 2 case l)?
- 2 port TB endpoint design (use INTEL AR 4C – 2 port TB)
- Bus power could provide 5V (LV) or 12V (HV) : power source
- Thunderbolt port could swich up-stream / down-stream (1-port up-stream / 1-port down-stream )
- DP port (1 port down-stream): DP source
- USB 3.1 Gen 2 (1 port down-stream): USB 3.1 source
- 1 port TB endpoint design (use INTEL AR 2C – 1 port TB)
- Bus power only accept the Host HV: power sink
- Thunderbolt port only up-stream port
- No DP port
- No USB 3.1 Gen 2 port
BRS
Nat