• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 33 subscribers
  • Views 1145 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83867IR 4-level Strap Resistor Values

Daisuke Maeda
Guru 20285 points
Other Parts Discussed in Thread: DP83867IR

The DP83867IR datasheet(SNLS484B) describes the 4-level Strap Resistor ideal values in Table 2. These values do not consider other circuit except the strap circuit. If a device connected to a strap pin has internal resistor, the internal resistor value of the strap pin must be considered.

All strap pin are PD (internal pull-down). What is the internal pull-down resistor value of each strap pin?

When VDDIO=1.8V, what is the voltage range to select each mode?

Best regards,

Daisuke

 

  • 0
    TI__Mastermind 19780 points

    Hi Daisuke,

    You can get the voltage range using a resistive voltage divider equation and the resistors we recommend for the modes.  All the DP83867IR strap pins have internal 9k ohm pull-down resistors with 25% tolerance in parallel with the Rlo resistor.

    A future datasheet revision will include the voltage range for all modes and VDDIO levels.

    Best Regards,

  • 0 in reply to Rob Rodrigues
    Guru 20285 points

    Hi Rob Rodrigues,

    Thank you for your reply.

    Please take actions immediately that a future datasheet revision includes it.

    Best regards,

    Daisuke

     

  • 0 in reply to Rob Rodrigues
    Guru 20285 points

    Hi Rob Rodrigues,

    Please tell me the voltage range for MODE1.

    For MODE1 the external pull-up/down resistors are not needed in Table2 then the nominal voltage is 0V, but the external pull-down resistor may be needed when the external device connected to a strap pin has internal pull-up.

    Best regards,

    Daisuke

     

  • 0 in reply to Rob Rodrigues
    Guru 20285 points

    Hi Rob Rodrigues,

    The device connected to strap pin has internal 9k ohm pull-up.

    Can you tell me the recommended value of external pull-down (Rlo) resistor connected to this strap pin for MODE1?

    Should this strap pin be opened during the Hardware Configuration Latch-in Time (T2)?

    Best regards,

    Daisuke

     

  • 0 in reply to Daisuke Maeda
    TI__Mastermind 19780 points
    Hi Daisuke,

    For mode 1, minimum voltage is 0 and maximum voltage is 0.065*VDDIO.

    You would have to add a very strong pull-down resistor on the pin to enter mode 1 with a 9k pull-up also present from the MAC. The pull-down would have to be less than 650 ohm 1% and then we have to consider current consumption of the strap during normal operation.

    Yes, the alternate route is to keep the strap pin open for latch-in time(T2) after PHY RESETn is released. Putting the MAC into a high-z state during latch-in is the best method for your system.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Guru 20285 points

    Hi Rob Rodrigues,

    Thank you for your reply.

    Best regards,

    Daisuke