SN65DSI86 can‘t drive 3840*2160

You must enable ASSR in panel before starting semi auto link training.

Attached document has example of how to enable ASSR in panel.

Please provide a register dump and panel datasheet.

3554.6036.DSI86_SW_EXAMPLES.pdf

非常感谢您的回复！

The following is my code。same code,  i had  enabled the ASSR, can drive 2560*1440 and 1920*1080。

	WriteI2C_Byte(0x0a, 0x06); //REFCLK 27MHz
	Delay_ms(200);
	
	WriteI2C_Byte(0x10, 0x00); //奇偶 8lane
	Delay_ms(20);

	WriteI2C_Byte(0x12, dsi_clk_f/5);//3840*2160 30Hz, dis_clk_f=408
	WriteI2C_Byte(0x13, dsi_clk_f/5);
	Delay_ms(20);
	
	WriteI2C_Byte(0x5a, 0x05); //enhanced framing and ASSR 
	Delay_ms(20);
	
//	WriteI2C_Byte(0x93, 0x10); //1 DP lane
//	WriteI2C_Byte(0x93, 0x20); //2 DP lane
	WriteI2C_Byte(0x93, 0x30); //4 DP lane

	Delay_ms(20);
	
//	WriteI2C_Byte(0x94, 0x80); // 2.7Gbps
//	WriteI2C_Byte(0x94, 0x20); // 1.6Gbps
	WriteI2C_Byte(0x94, 0xe0); // 5.4Gbps

	Delay_ms(20);	
		
	WriteI2C_Byte(0x0D, 0x01); //PLL ENABLE
	Delay_ms(20); //等待PLL
	
	WriteI2C_Byte(0x95, 0x00); //POST-Cursor2 0dB
	Delay_ms(20);
	
	WriteI2C_Byte(0x64, 0x01); //Write DPCD Register 0x0010A in Sink to Enable ASSR
	WriteI2C_Byte(0x74, 0x00);
	WriteI2C_Byte(0x75, 0x01);
	WriteI2C_Byte(0x76, 0x0A);
	WriteI2C_Byte(0x77, 0x01);
	WriteI2C_Byte(0x78, 0x81);
	Delay_ms(15);
	
	WriteI2C_Byte(0x96, 0x0a); //Main - Semi Auto Link Training.
	Delay_ms(250);		

	ReadI2C_Byte(0X96, &rd[0]); 
	printf("\n\r0x96=%2x", rd[0]);
	Delay_ms(10);
			
	ReadI2C_Byte(0XF8, &rd0]); 
	
	printf("\n\r0xf8=%2x", rd[0]);
	
	
	//CHA LCD_H
	WriteI2C_Byte(0x20, Lcd_LCDH/2);
	WriteI2C_Byte(0x21, Lcd_LCDH/2 >> 8);
	
	WriteI2C_Byte(0x22, Lcd_LCDH/2);
	WriteI2C_Byte(0x23, Lcd_LCDH/2 >> 8);
	
	//CHA LCD_V
	WriteI2C_Byte(0x24, (Lcd_LCDV));
	WriteI2C_Byte(0x25, Lcd_LCDV >> 8);
	
	WriteI2C_Byte(0x26, (Lcd_LCDV));
	WriteI2C_Byte(0x27, Lcd_LCDV >> 8);
	
	//CHA HSPW = Horizontal Sync Pulse Width
	WriteI2C_Byte(0x2C, Lcd_HSPW);
	WriteI2C_Byte(0x2D, (Lcd_HSPW>>8)|0x80);// [7]=1低电平有效, [6:0]-HSPW高6位
	
	
	//CHA VSPW = Vertical Sync Pulse Width
	WriteI2C_Byte(0x30, Lcd_VSPW);
	WriteI2C_Byte(0x31, (Lcd_VSPW>>8)|0x80);// [7]=1低电平有效, [6:0]-VSPW高6位
	
	//CHA HBPD = Horizontal Blanking - (Horizontal Sync Offset + Horizontal Sync Pulse Width) 
	WriteI2C_Byte(0x34, Lcd_HBPD);
	
	//CHA VBPD
	WriteI2C_Byte(0x36, Lcd_VBPD);
	
	//CHA HFPD
	WriteI2C_Byte(0x38, Lcd_HFPD);
	
	//CHA VFPD
	WriteI2C_Byte(0x3A, Lcd_VFPD);
	
	WriteI2C_Byte(0x5B, 0); //DP 24bpp
	
	WriteI2C_Byte(0x3C, 0); //关自测
//	WriteI2C_Byte(0x3C, 0x10); //自测
	
	WriteI2C_Byte(0x5A, 0x0D); //Video data from DSI is passed to DisplayPort


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Has relationship with the TPS3?


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由于保密原因，只能给出部分datasheet.

Part Data Sheet.docx

Enable interrupt sources and use interrupt scheme to detect if there is any error happen inside DSI86.

Please make sure your panel supports ASSR.

Regards