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DS92LV2421_2422 output signal

Other Parts Discussed in Thread: DS92LV2421, DS92LV2422

Hello,

Our customer uses the DS92LV2421_2422 pair.

The customer inputs signal to the DS92LV2421 75MHz CLKIN only, other data inputs are Low static.

He checked output of the DS92LV2422. The LOCK status is '1' but there is no signal from CLKOUT.

Could you tell me what is the cause of this effect?

Regards,

Naoki Aoyama

  • Hi Aoyama-san,

    If the PLL is able to assert LOCK, the outputs should become active and you should see an active CLKOUT signal. Please double-check the settings for both serializer and deserializer to see if any of the pin settings could prevent the output from asserting. For example, if OP_LOW = 1, even when LOCK = 1 the outputs will be held low until OP_LOW is released by register programming. Feel free to share schematic or list of jumper settings if you would like us to review.

    Thanks,

    Michael
  • Hi Michael-san,

    Thank you for your reply.
    I checked the configuration of the customer using, OP_LOW=open.
    The configuration of other terminals is as below.

    DS92LV2421
    RFB(11), CONFIG0(12) and VODSEL(24) is High.
    Another terminal is open(Low).

    DS92LV2422
    CONFIG0(9) and OSS_SEL(17) is High.
    Another terminals is open(Low).

    Do you have any idea?

    Thanks,
    Naoki Aoyama
  • Hi Aoyama-san,

    Assuming that PDB = High as well, there does not seem to be anything wrong with the configuration you have.

    I have some other suggested tests to try out:

    1. Can you probe the RIN serialized CML data coming into the deserializer? I want to double-check that the data makes sense going in.

    2. Double-check to see if the LOCK pin is somehow in a High-Z state. This can be done by tying a 4.7k pullup (or higher resistance) to VDD, and then separately tying a 4.7k pull-down to GND. If the voltage on the LOCK pin goes up and down depending on the pullup/pull-down resistor, it may be possible that the LOCK = 1 output you are seeing is not a true representation of the LOCK status.

    3. Try running the DS92LV2421/22 in BIST mode in order to generate some data in addition to the clock you are providing. Please see if this helps the CLKOUT signal to come out.

    4.Can you run the device at a lower clock rate (for example, 50 MHz)? Can you see an CLKOUT signal with a lower operating frequency?

    Thanks,

    Michael

  • Hi Michael-san,

    I have requested the customer to try running the devices in BIST mode and lower
    clock rate.
    Could you wait a minute?
    Because the customer is adapting his board for use BIST mode.
    (The board is the customer's original.)

    Thanks,
    Naoki Aoyama