Hello,
We are considering our system design options for VBUS sensing into our FPGA, as so have the following questions:
1. Within the TUSB1310A, is the VBUS input connected to any USB 3 related logic/analog, or is it that ONLY the PWRPRESENT output is a function of the VBUS input?
2. Is the TUSB1310A VBUS input fed into an internal comparator, and the output of that comparator is output as PWRPRESENT? If so, what threshold voltage is the comparator set to use (in post 90.9Kohm/10.0Kohm external resistor divider domain) ?
Thanks & Regards,
KT