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Does DS125MB203 works if I loopback S_OUTB1 to S_INB0...?

Sek Yuen Loo
Prodigy 30 points
Other Parts Discussed in Thread: DS125MB203, DS100MB203

Our application need to loopback a 10Gb/s signal (66/64b encoded) from S_OUTB1 to S_INB0. The signal path is:

D_IN1 ---(int)---> S_OUTB1 --(ext)---> S_INB0 --(int)--> D_OUT0

D_IN0 ---(int)---> S_OUTB0 --(ext)---> S_INB1 --(int)--> D_OUT1

int - internal in DS125MB203.

ext - external board routing.

Above configuration does not works for us...Any help on this is very much appreciated.

Thanks,

Loo.

  • 0
    TI__Intellectual 1985 points

    Hi Loo,

    It looks like you are using the "B" outputs and "B" inputs for a loopback path and the "A" outputs and "A" inputs for your normal ("mission mode") path. There are a couple things to keep in mind when using such a configuration:

    1. This path will pass through the DS125MB203 twice, so you will want to reduce the equalization level to make sure you don't over-equalize in loopback mode. I suggest starting by setting both channels' EQ to Level 1 (EQ=0x00): Reg_0x16 (INB0 EQ), Reg_0x24 (INB1 EQ), Reg_0x2C (DIN0 EQ), and Reg_0x3A (DIN1 EQ). 
    2. Make sure you don't have any polarity inversions in the path. 10GbE requires the correct polarity to establish link-up. Double-check the routing between the 10GbE signal source and the D_IN* input, between the OUTB* output and the INB* input, and between the D_OUT* output and the final destination.

    If you are still having troubles getting link-up, it would help if you could describe the symptoms of the problem so we could provide further assistance.

    Regards,

    Casey

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  • 0 in reply to Casey Morrison
    Prodigy 30 points

    Hello Casey,

      Thanks for the quick response.

    This path will pass through the DS125MB203 twice, so you will want to reduce the equalization level to make sure you don't over-equalize in loopback mode. I suggest starting by setting both channels' EQ to Level 1 (EQ=0x00): Reg_0x16 (INB0 EQ), Reg_0x24 (INB1 EQ), Reg_0x2C (DIN0 EQ), and Reg_0x3A (DIN1 EQ). 

    [LOO] We did set all EQ to 0x00 and still see the problem.

    Make sure you don't have any polarity inversions in the path. 10GbE requires the correct polarity to establish link-up. Double-check the routing between the 10GbE signal source and the D_IN* input, between the OUTB* output and the INB* input, and between the D_OUT* output and the final destination.

    [LOO] We checked and the polarity is correct.

    We did ask for support through AVNET as well and we have sent schematic for you to review. Below are the responses for your questions on the schematic:

    One question regarding the schematics: I do not see 100nF AC coupling capacitors on the high-speed nets. Are these capacitors on another schematic page, or are there no AC coupling capacitors on the high-speed nets?

    [LOO] We do NOT have AC coupling capacitors on the high speed nets. Does these nets required AC coupling...? Even at the loopback path...?

    Can you setup this test scenario on your DS125MB203 dev board and see if it works for you..?

    10Gb/s Signal Gen ---AC Coupling CAP --> DIN(DS125MB203) ---> S_OUTB1 ---NO AC Coupling CAP--> S_INB0 ----> DOUT ----AC Coupling CAP ---> 10Gb/s Signal Check/Scope for eye measurement.

    We are going to respin the board soon and if this is confirmed to be the problem, then we will fix it in the next board spin. 

    If the customer is still having troubles getting link-up after checking Liang's and my suggestions, it would help if you could describe the symptoms of the problem and reply to the post so we could provide further assistance.

    • What bit error rate are you seeing?

    [LOO] High bit errors such that the link does NOT comes up. 

    • Is the "high bit errors" problem only happening in loopback mode? How about "non-loopback" mode?

    [LOO] The high bit errors problem only happen in the loopback mode. The non-loopback mode pass traffic through without any errors.

    • Does the ASIC receiver have an eye opening indication, and if so, is the eye height / width healthy?

    [LOO] The ASIC receiver does have an eye opening indication and the eye is completely close such that we see errors on all vertical and horizontal settings. At some settings, the errors are lower than others..ie 5 error/1984 ..

    • Does the loopback work at lower speeds?

    [LOO] I have NOT try lower speed but we can try that and let you know the outcome.

     

    Thanks,

    Loo.

  • 0 in reply to Sek Yuen Loo
    TI__Intellectual 1985 points

    Hi Loo,

    I took a look at this case in the lab, and here are my findings, along with answers to your questions:

    One question regarding the schematics: I do not see 100nF AC coupling capacitors on the high-speed nets. Are these capacitors on another schematic page, or are there no AC coupling capacitors on the high-speed nets?

    [LOO] We do NOT have AC coupling capacitors on the high speed nets. Does these nets required AC coupling...? Even at the loopback path...? 

    [Casey] Yes. As indicated in the Datasheet Pin Functions table and the Simplified Schematic, all high-speed I/O pins require AC coupling, even if the system is configured in a loopback configuration.


    Can you setup this test scenario on your DS125MB203 dev board and see if it works for you..?

    10Gb/s Signal Gen ---AC Coupling CAP --> DIN(DS125MB203) ---> S_OUTB1 ---NO AC Coupling CAP--> S_INB0 ----> DOUT ----AC Coupling CAP ---> 10Gb/s Signal Check/Scope for eye measurement.

    We are going to respin the board soon and if this is confirmed to be the problem, then we will fix it in the next board spin. 

    [Casey] I tried this in the lab, and I can confirm that AC coupling is required, to the point where the link will not work if the loopback path is not AC coupled.

    I first connected a 10G PRBS31 source (Tektronix BSA286C BertScope)  to IN1->OUTB1 and looked at the OUTB1 signal on the BertScope using the Eye Diagram feature. Note that the DS100MB203 EVM board has on-board AC coupling capacitors, so this signal is AC coupled.


     Then I hooked up the loopback configuration you described: BertScope -> IN1 -> OUTB1 -> INB0 -> OUT0 -> BertScope. Again, in this configuration, AC coupling capacitors exist on every high-speed link: between the BERT and IN1, between OUTB1 and INB0, and between OUT0 and the BERT. Here's what the signal looks like at OUT0:


    I then re-worked the EVM to remove the AC coupling caps in the loopback path (between OUTB1 and INB0) and replace them with 0 Ohm resistors. After doing this it was clear to me that this was causing the problem, as the eye was completely closed. Here is how the signal at OUT0 looks when the caps in the loopback path are removed:

    Then, just to make sure that bad re-work wasn't causing the eye to close, i added an external AC coupling capacitor in the loopback path (between OUTB1 and INB0), and the eye became wide open again. Here is how the signal at OUT0 looks when an external AC cap is added to the loopback path:

    Based on this I can confidently say the problem is the lack of AC coupling capacitors in the loopback path.

    Regards,

    Casey

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  • 0 in reply to Casey Morrison
    Prodigy 30 points
    Hello Casey,
    This helps a lot. Thanks for doing this for us.

    Best Regards,
    Loo.