DS90CF386 LSB, signal definitions

Hi Dave,

There are two popular practices for serializing 24-bit RGB onto 4 LVDS data pairs. One is to put the two LSBs on the 4th LVDS pair (i.e. RXIN3), and the other is to put the two MSBs on the 4th LVDS pair. I suppose what appears conflicting is the "16 Grayscale" Test Pattern on p. 4 of the datasheet. This is an example implementation where the MSBs have been serialized onto RXIN3. In Application Note 1127, the mapping assumes that the display assumes the two LSBs are serialized onto RxIN3.

The best way to understand how best to map the signals is to look at how they are being serialized from the PC motherboard and whether the PC motherboard is loading the two MSBs or LSBs on RxIN3 (I do not think we have other app notes that will specifically explain what you are asking). At the end of the day, the DS90CF386 is simply a deserializer that will map out bits according to the mapping shown on Figure 10 of the datasheet, regardless of what topology you use. By looking at how the PC motherboard loads the RGB bits onto the LVDS lines, we can determine which RGB bit will map to which RxOUT parallel output. Thus, if your customer could share this information about the PC Motherboard, that would be helpful.

As for your question about signal labeling, I presume that RGB[7:0] signals are self-explanatory. For the other signals:

- Dot Clk = Pixel clock. This is the operating frequency by which to clock the parallel outputs of the DS90CF386
- RES = This is a reserved bit that is not typically used by the LCD. You are free to use this as a general purpose bit, or leave unconnected.
- HSYNC = Horizontal sync signal, indicating to begin writing a new row
- VSYNC = Vertical sync signal, indicating to begin a new frame
- EN = This is a data enable signal that goes high when the signal to the LCD is valid

Thanks,

Michael

Hi Michael,

I really appreciate the explanation! Let me feed this back to my customer and see if it helps.

Thanks,

Dave