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DS92LV2411 CLKIN Spread Spectrum at 7MHz input

skikingmg
Prodigy 90 points
Other Parts Discussed in Thread: DS92LV2412, DS92LV2411, DS90UR905Q-Q1, DS90UR906Q-Q1

I am driving a DS92LV2411 with LVDS signals from an Atmel 9G45 processor which has an Abracon ASSVP Spread Spectrum 12MHz clock source (+/-2% spread).  I notice that the DS92LV2411 successfully operates (paired with a DS92LV2412) when a non spread clock is placed on the board instead of the 2% ASSVP clock source.  I am wondering if someone can clarify the datasheet page 18 of DS92LV2411 datasheet.  Section 7.9 states the SSC(IN)  limit as +/- 0.02 kHz at 50MHz.  Is that supposed to be 2% at 50MHz?  could someone clarify this for me?

Abracon ASSVP datasheet:

http://abracon.com/Oscillators/ASSVP.pdf

Thank you

Mark

  • 0
    TI__Mastermind 29655 points
    Hi Mark,

    I think you have found a typo in the datasheet. It should say +/- 0.02 x f_CLK, or +/-2% of the operating frequency. This can be verified by looking at the DS90UR905Q-Q1 and DS90UR906Q-Q1, which is an automotive qualified version of the same chipset. Throughout the datasheet, f_dev should be calculated as a percentage of the pixel clock.

    Thanks,

    Michael