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Help with configuration of DS125BR401SQ for I2C functionality

Other Parts Discussed in Thread: DS125BR401, DS80PCI402

Team, 

My customer needs help with DS125BR401SQ device:

What is the required configuration of this chip to be able to make use of the I2C functionality?  The chip works as expected in PIN MODE, however, when changing the pin configuration setup to enable the SMBus, I am unable to read the status of Table 10’s 8-bit registers described in the datasheet.  When issuing an I2C Write to register 0x06 with a value of 0x18, I am still unable to access the registers after the write has completed.

Besides writing to register 0x06, is there anything that I am missing?

 

DS125BR401SQ_sch.pdf

  • Moving to high-speed interface
  • Hi Viktorija,

    I reviewed your schematic and all the pins look reasonable for the device to be set up appropriately in SMBus Slave Mode. When you first power up the device, you should be able to read Reg 0x06 and see that it loads with default value 0x10. Since your AD[3:0] pins are set to 0000'b, the device responds to SMBus 7-bit Address 0x58 (8-bit Write address 0xB0).

    Is there anything else connected to the SMBus SDA/SCL line aside from the repeater and your programming tool? It could be possible that something is holding the line or that there is another device on the line that also responds to SMBus 7-Bit Address 0x58.

    Thanks,

    Michael
  • Thank you. 

    Per customer:

    We solved the problem…

    Page 24 of 52 shows a Device Slave Address Byte.  The address bytes listed are in shifted form for writing only.  To reduce confusion, maybe there should be a note somewhere that states that.  For instance, the I2C address truly isn’t 0xB0, it is 0x58.  0xB2 = 0x5A and so on…  Each I2C device has their own read address and their own write address.

    Thanks

    Viktorija

  • Hi Viktorija,

    Thanks for following up, and glad to hear that the issue is resolved!

    We have begun clarifying this SMBus address discrepancy in recently revised datasheets (for example, the DS80PCI402, p. 17). We'll roll these updates into our next revision of the DS125BR401 when we reach the next revision cycle.

    Michael