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Basic SerDes Question: Constant input equals constant output?

Paul Goedeke
Mastermind 30600 points

Hello!

I'm hoping you can help me answer a somewhat basic question. If I hold one of the parallel bits HIGH on the input, should I expect a constant HIGH on the corresponding output? Intuition tells me yes, but I'd like to confirm that is the case.

What does it tell me if I'm getting a pulsing output, with pulses of varying lengths? Any approaches to take for debugging this?

Thanks!!

Paul

  • 0
    TI__Mastermind 29655 points

    Hi Paul,

    Let's say you take a SerDes pair, connect them together, provide a valid TxCLKIN within the PLL lock range, and input a fixed high level voltage on one parallel input of the serializer (say, TxIN0). On the deserializer end, you should expect a constant DC high voltage on the matching parallel output (in this case, RxOUT0).

    If you are getting a pulsing output on the corresponding parallel output of the deserializer, there be some issues with the PLL locking to the appropriate serialized clock. It may also be possible that there is a bad or noisy connection between serializer and deserializer pair.

    Is this issue related to a particular part, and if so, do you have any more information about the setup that's causing the pulses you are seeing? Any part numbers, schematics, waveforms or scopeshots you can provide to debug will be helpful.

    Thanks,

    Michael

  • 0 in reply to Michael Lu (Santa Clara)
    TI__Mastermind 30600 points
    Thanks Michael, I appreciate the help. Just wanted to confirm what my intuition was!

    Paul