Hi
I am using the ISO1540 for a somewhat unusual application, where I need >3.5mA pullup on the Side 1 of the ISO1540. The absolute max for the IOL1 is 20mA per 7.1 (page 3) of the data sheet and recommended current is 3.5mA per 7.3 (page 4) of the data sheet. I noticed that the demo board actually uses a 1K pullup to 5V, thus 5mA. In other words, the demo board actually is > than the recommended conditions, but < the max conditions.
I need to do the same thing, perhaps even > 5mA, but << 20 mA.
I recognize that a higher current will increase the low voltage from the ISO1540.
Fortunately, the processor that I am interfacing with, has a Max VIL of 1.0V (it does not precisely follow the I2C standard). Thus, if I have a higher pullup current, thus causing a higher VOL max from the ISO1540, I will be ok.
So the question I have for TI is whether there is any other issue with a higher sink current on Side 1, as long as I stay well below the 20mA absolute max condition?
Is there data for VOL max/nom vs current? This would help me establish the margin that I have in interfacing to the processor.
