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ONET1151L DAC Setting

The bias and modulation DACs are 10 bits wide but the IIC interface only sets 8 bits per transaction.  When are the DACs updated?

  • Jim,

    10 bit wide registers for the bias and modulation current are used to increase the resolution but the 2 LSBs do not have to be used since they will result in such a small change to the bias or modulation current. The DACs for the bias and modulation current are updated just like any other register. Therefore, if you want to update all 10 bits, you have to send 2 I2C commends. for example, send a command to register 3 then send a command to register 2 to fully update the modulation current. However, as I noted above this is not really needed.

    Regards,
    Alex.
  • The lasers we use typically give 1mw of output power for 30mA of bias current but 5mA is for threshold leaving gain of 25mA/mW. The bias dac sensitivity is 102uA/bit giving full scale of 104mA, then 8 bits gives .4mA resolution or change of 1.5% in optical power. Agree not a big problem unless the bandwidth of the DAC circuit is such that the change in bias current is seen in the spectrum of the receiver. If it did it would take away from the link budget. It seems strange in today's world that a DAC would not be double buffered so all bits would update when LSB or MSBs are written. So how does the DAC behave with the APC loop? Does the APC loop use 10 bits or 8 bits? What is the bandwidth of the APC loop? All questions to be answered once we receive the eval board.
  • Jim,

    The APC is an analog loop and it is not adjusting the register settings. The register setting sets the initial point of operation and then the APC loop adjusts the bias current through analog control to try and keep the photodiode current constant.

    We specify the time constant of the APC loop to be about 120us with a PD current of 100uA, a bias to PD current ratio of 40 and a COMP capacitor of 0.01uF.

    Regards,
    Alex.