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Momentary High-to-Low Glitch on I2C SDA Line TUSB320

Ned Dempsher
Intellectual 260 points

Hi TI,

I am using a TI Sitara processor to drive an I2C interface into a TI TUSB320I USB chip. Sitara I2C is created using conventional IO and is not optimized for slow I2C interfaces meaning really fast fall times. I am getting a momentary (meaning it's over in ~5-6ns) High-to-Low transmission line glitch in my signal integrity simulation. Many parts have glitch suppression and there should be no problem with setup and hold time as it is over so quickly but I cannot find any assurance in the datasheet that this will be ok.

Should I be ok with this momentary glitch?

Thanks Much TI,

Ned

  • 0
    TI__Mastermind 36085 points

    Hello Ned,

        As long as you haven't faced I2C communication errors should be fine, but I would like to see the glitches and evaluate if it is a possible issue. Please attach a scope capture to analyze.

    Regards,

    Diego. 

  • 0 in reply to Diego Cortes
    Intellectual 260 points

    Hi Diego,

    This is being released for build so we do not have any lab data. I've pasted a screenshot of the SI simulation. It looks pretty nasty. This is due to the very fast falling edge of the TI Sitara processor BUT as nasty as it looks it is gone after 5ns so I am hoping that it will not be a problem for this part.

    Thanks Very Much!

    Ned