Engineer is worried that he will need a level shifter for HD3SS3212.
He uses 1.8V for logic, but it looks like the minimum logic level is 1.7V…..this may be too tight, as there is only 100mV of buffer.
What do you propose? Is that an error in the data sheet? I expected to see 1.3V….
Can you check the USB switch on OE and SEL pin and see what voltage thresholds turn them on or off?
The 1.8V is coming from a QUALCOMM chipset, and engineer does not know how much variance there will be in the voltage.
If a level shifter is needed, could you give a suggestion?
