How to use TUSB1310A as for USB 2.0 host only core ?

Hello Shweta,

Probably you need to adjust both XcvrSelect and TermSelect bits at the Function Control Register (0x04h) in order to get the required USB speed.

Regards,
Gerardo

Hello Gerardo ,

The XcvrSelect is set 01 and TermSelect is 1 before connecting the device . These values are required to detect High Speed device. But i m not getting it. I am using USB 2.0 hard disk as device for testing.
Can it happen that strapping logic might not be correct ?
Can you guide me with TI reset assert timings ? My system clock is 50Mhz.

Thanks,
Shweta

Hello,

Below is the strapping logic we are using where rstn_sw0 is hardware reset and sysclk = 50 Mhz.
pwr_resetn is TUSB1310 RESETN

always @(posedge sysclk or negedge rstn_sw0)
begin
if (~rstn_sw0) begin
strap_prog_cnt <= {14{1'b0}};
strap_prog <= 1'b0;
pwr_resetn <= 1'b0;
phy_out_en_o <= 1'b0;
rstn_powerup <= 1'b0;
end else begin
// starting strap programmation counter during 327us
if (strap_prog_cnt < 14'b11111111111111) begin
strap_prog_cnt <= strap_prog_cnt + 1;
end
// enable TI output after eight clock cycle the PHY
if (strap_prog_cnt < 14'b00000000000111) begin // - 8 for 50 MHz
// if (strap_prog_cnt < 14'b00000000001100) begin // 12 for 62.5
phy_out_en_o <= 1'b0;
end else begin
phy_out_en_o <= 1'b1;
end
// de-assert TI phy reset after 128(-8) clock cycle (2.4us). need to have a pulse of resetn asserted at least 1 us.
if (strap_prog_cnt < 14'b00000010000000) begin // 2 uSec for 62.5MHz
pwr_resetn <= 1'b0;
end else begin
pwr_resetn <= 1'b1;
end
// de-assert ULPI data and rxelecidle and phystatus after 131 clock cycle (2.41us)
if (strap_prog_cnt < 14'b00000010000011) begin
strap_prog <= 1'b0;
end else begin
strap_prog <= 1'b1;
end
// enable USB3.0 core after the sequence after 327us (wait at least 300us after phy reset)
if (strap_prog_cnt < 14'b11111111111111) begin
rstn_powerup <= 1'b0;
end else begin
rstn_powerup <= 1'b1;
end
end
end

Thanks,
Shweta

Hello Shweta,

I will check the info and I will come back to you soon.

Regards,

Gerardo

Hi Shweta,

Everything looks fine,

Can you send the schematic at TUSB1310 section in order to take a look on it?

Regards,

Gearado

Hello Gerardo,

I don't have the exact schematic . We are using Z702 board as USB3.0 host with TI PHY .

Regards,

Shweta

Hello Gerardo ,

The problem is solved now Actually the issue was in addon we were using to connect the device.

Thanks and Regards,

Shweta

Hello,

Currently the addon board which we are using have DP,DM connections cross connected. Thus , DP of host (from TI Phy) is connected to DM of Device .

Now the analyzer is able to detect SOF packet  but i have doubt whether that SOF will reach device end in same format ?

Will TUSB1310A will decode the sync and EOP pattern for usb2.0 high speed from the device correctly ?

Hello Shweta,

Glad to see that the issue is solved now.

Please open a new post for the additional questions.

Regards,

Gerardo