Dear TI Sirs,
I am designing USB testing interface. Part of the plan is to implement possibility to branch (not splitting) USB2.0 data lane between Host and Device. Target is only to be able to listen to the communication in data lane between Host and Device not to take part of communication. Plan is to connect branched lane FPGA’s High Speed Tranceiver input. TUSB211 chip will be used as USB2.0 redriver near USB3.0 connector. Distance from branching position to FPGA will be about 70mm, PCB material is high quality and used USB bit speeds are 1.5, 12 and 480MHz.
Could you please recommend solution this problem and suitable components for branching implementation?
Br Peter