Dear specialists,
Please let me ask you three questions about the DS90UB948-Q1.
My customer is designing a prototype using the DS90UB948-Q1
with a mode to show as follows.
*** Device functional Mode *****************************
2lane FPD-LinkⅢ Input, Dual Link OpenLDI Output
24bit Color Dual FPD-Link Mapping LSB on D3/D7
MODE_SEL0 : [MAP_SEL:0 / OUTPUT_MODE:00 / Dual OLDI output]
MODE_SEL1 : [Repeater:0 / MODE:00 / 5Mbps / STP]
********************************************************
Q1)My customer understand that the CLK1+/- and the CLK2+/- are same timing
signals from the Figure 33 on the data sheet page36.
So, he is going to design the proto type using the CLK1 only.
(CLK2 is unused)
Is there any problem?
Q2)According to the data sheet(from page5 to page7),it is described
that "for unused SPI,GPIO(s),D_GPIO(s),I2S,tie to an external pulldown".
What is the resistance value that should be used?
Q3)Is there any problem,if those pins are pulled up by each external resistance?
*those pins＝SPI,GPIO(s),D_GPIO(s),I2S
Best regards.
Tsuyoshi Tokumoto
