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Question about DS90UB949 I2C net bit rate and HPD pin working theory

Kevin Wen
Intellectual 2235 points

Hi team,

Would you please help us with some questions about DS90UB94x device? Thanks.

  1. I2C net bit rate of DS90UB94x device: In 949 datasheet, it point to AN SNLA131 for I2C net bit rate calculation of, but As 949/498 support I2C Fast-Mode Plus with 1MHz clock frequency, the net bit rate should be calculated as 9 bits / ((Host_bit*9)+(Remote_bit*9)+ FCdelay + BCCdelay). The AN didn’t show the FCdelay and BCCdelay of DS90UB94x device, would you please help to confirm whether it is the same as DS90UB92x device?

  2. DS90UB949 HPD pin working theory: As HPD(Hot Plug Detect) pin would give source a signal of ready to receive, customer is thinking to use this function to detect the link connection between 949 and 948, so they can monitor the status of FPD-Link connect when display side power down accidentally . They wish to know on what condition will 949 give ‘ready to receive’ signal if they put DDCROM on 948 side. If this approach can’t meet their requirement, do we have any other method to monitor the power status on DES side?

Kevin