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TLK10232 - Test pattern generator settings

Kawai
Guru 19785 points
Other Parts Discussed in Thread: TLK10232, TLK10232EVM

Hi Team,

I am understanding that TLK10232 has pattern generator / verifier and it could be controlled ON/OFF from pin or through MDIO.

A). PRBSEN pin = High would enable PRBS generator and verifier. Also enables PRBS_PASS pin output.

B). REG 0x1E, 0x000B setting would also enable test pattern generator and verifier.

[Q1]
Which setting (Pin or MDIO) has the priority ?

[Q2]
In normal operating mode with PRBSEN pin = Low, would there be a case that TLK10232 PRBS_PASS pin driven High, except when RESET_N=Low ?

Best Regards,

Kawai

  • 0
    TI__Genius 16150 points
    Hi Kawai,

    I performed a quick test in the TLK10232EVM and the MDIO has the priority. Even in the EVM, user is can place a header in JMP100 to disable the control via software. You could take a look into TLK10232EVM Users guide (Page 6).

    Best Regards,
    Luis Omar Morán Serna
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    Guru 19785 points
    Hello Luis-san,

    Thank you for checking. I understood that even if you have the PRBSEN pin setting to low (disabled), user could enable the test pattern through the MDIO.

    Best Regards,
    Kawai