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XIO2001: /WAKE signal when power down

Other Parts Discussed in Thread: XIO2001

Hi all,
My customer faces the problem of /WAKE signal when XIO2001 is power down.

They have been evaluating the XIO2001 on their designed board. 
When they tried the system shutdown operation, the /WAKE signal falls about 1.5us
to the level of low. As a result, an upstream side is waked up by mistake.

1. Will the /WAKE signal be output at the falling edge of the /PERST signal?
2. When the /PME  signal is at the "H" level, is there the way to ensure that does not 
    generate the /WAKE signal?
3. Are there a set of parameters to XIO2001 as a countermeasure?




Regards,
Toshi



  • Hello,
    Please verify the following:
    PME# shall be connected to Vaux, otherwise it will trigger a wake signal every time power is removed.
    PERST# should not cause the WAKE# terminal to go low.
    WAKE# signal must have a system side pull-up.
    An incorrect power-up or power-down sequence could cause the bridge to erroneously assert WAKE#.

    Regards