Underlined sentences below point to my confusion within the datasheet.
My main question(s) is(are) related to input signal HPD_SNK, and what can be expected of TMDS clock ratio should HPD_SNK (and/or SCL_SNK/SDA_SNK) input(s) be un-driven (NO Connect).
DP159 Datasheet Specifics -
Register 0x09, Bit 2 (HPD_AUTO_PWRDWN_DISABLE) allows one to override (=1) the automatic power-down of the device based on the level of HPD_SNK.
Register 0x0B, Bit 1 (TMDS_CLOCK_RATIO_STATUS) states that the field is reset to the default value (=0, TMDS clock is 1/10 of TMDS bit period) whenever HPD_SNK is de-asserted for greater than 2 ms.
Section 8.4.3 DDC Training for HDMI2.0 Data Rate Monitor states "The SNx5DP159 will always default to 1/10 of TMDS bit period unless a 1 is written to address 0xA8 offset 0x20 bit 1. When HPD_SNK is de-asserted, this bit is reset to default values. If the source does not write this bit the SNx5DP159 will not be configured for TMDS clock 1/40 mode in support of HDMI2.0"
Question(s) -
(1) Does HPD_AUTO_PWRDWN_DISABLE override not only power-down of the device, but also the clearing of TMDS_CLOCK_RATIO_STATUS to 1/10 when HPD_SNK is de-asserted? Stated another way in finer detail: If TMDS_CLOCK_RATIO_STATUS is currently at 1/40, will the bit return to default 1/10 value after 2ms should no signal be connected to HPD_SNK, even though HPD_AUTO_PWRDWN_DISABLE is set to override HPD_SNK? I forced an assumption here that should probably have been clarified in section 8.4.3. Of course it is possible that I just 'stretched' the reach of HPD_AUTO_PWRDWN_DISABLE beyond its intended function of just keeping the device active and supplying output even if HPD_SNK is de-asserted.
(2) Is it a requirement that SCL_SNK/SDA_SNK be connected (inputs driven) such that the I2C snoop function be operational in order to update register 0x0B Bit TMDS_CLOCK_RATIO_STATUS, or can the source just update between 1/10 and 1/40 clock ratios by directly writing to TMDS_CLOCK_RATIO_STATUS via this 'RWU' register? If true, it was not clearly stated in 8.4.3 to be the case, but was instead biased by the intended use and description of the I2C snoop function to supply this update mechanism during the source write direct to the sink.
