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TPS65982 - Ramifications of shorting top/bottom D+/D- pins at the connector, single USB 2.0 pair to IC

Other Parts Discussed in Thread: TPS65982, TUSB8041

Hello,

Instead of routing the separate USB 2.0 D+/D- top and bottom pairs to TPS65982, is there any issue with shorting top/bottom together at the connector, and routing the single pair to the IC?

If not, does it matter whether this merged pair is routed to C_USB_TP/N or C_USB_BP/N?

This is with a UFP, DP-sink application in mind. Figure 44 of the TPS65982 datasheet shows both the top and bottom USB 2.0 paths routed to the same crosspoint mux in the Digital Core, so I assume it's irrelevant whether this single pair is routed to C_USB_TP/N or C_USB_BP/N. But I'm not clear whether there is any functionality that is lost by doing this. It'd be preferred from a board space savings and ESD perspective.

Thanks,

Jonathan

  • Jonathan,
    There is not an issue with what you are attempting at the system level, but there is a nuance to this post that could be interpreted in a couple ways.

    If you want to sacrifice a small amount of signal integrity on the USB2.0 path, you may short D+ top & bottom together and short D- top & bottom together at the Type-C connector.

    However, when you do this you want to bypass the TPS65982 and route this differential pair directly into any other IC. So "the IC" in your sentence above could be a USB Hub in a Dock or the USB2 Port on the main processor in a Laptop.

    If the "bypass method" is used in a Dock, one of the Downstream pairs of the USB Hub may be routed to the TPS65982 to provide automatic Billboarding and other Features provided by the integrated USB2.0 Low-Speed Endpoint.
    Both USB_TP/TN & USB_BP/BN must be connected, so the top & bottom pins must be shorted together a 2nd time.

    The reasoning is simple: The TPS65982 automatically muxes these pins based on the polarity of the Type-C cable, so if only USB_TP/TN are connected and the cable is upside-down, the Endpoint will not be available even if it is enabled.

    The signal integrity would take another hit, but this is now a considerable low-speed signal, and the other Downstream pairs of the USB Hub would only be affected by the shorts at the Type-C connector.
  • Hi Brian,

    Many thanks for the detailed explanation, and helping to clarify where my question was vague.

    So if I don't want to bypass TPS65982, but rather run the USB 2.0 through it (to have the option of being an Endpoint / Billboard, or just pass the D+/D- to the system-side processor), I would connect USB_TP/TN and USB_BP/BN at the connector, route that consolidated pair to TPS65982, and then fan it back out to the USB_TP/TN and USB_BP/BN pins on TPS65982. And then USB_RP_P/N would connect to the system processor.

    Did I understand correctly?

    Thanks,

    Jonathan
  • Using a Type-C Dock as an example, I would make one correction to your sentence: "...route the consolidated pair to a USB Hub, such as the TUSB8041, and then..."

    If the TUSB8041 has run out of Downstream Pairs (DNX+/-) you can connect a less critical component to USB_RP/N, such as an Audio CODEC, that would not be affected if the TPS65982 needs to enter Endpoint/Billboarding mode. Although USB_EP and USB_RP may be enabled simultaneously, the EndPoint takes precedence when necessary and prevents a downstream device connected at USB_RP/N from communicating.

    In the case of a Laptop that is not using ThunderBolt (with Alpine Ridge IC), you may bypass the TPS65982 completely.

  • Thanks Brian. I'll follow up offline with a quick double-check on my specific application's use case, but I think we've sufficiently addressed the original question.

    Jonathan