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DS90UB926Q-Q1 - Link Error Count 0x41

Guru 20090 points


Hello,

In the datasheet P.42 0x41 address bit [3:0] Link error count, there is the following descriptions.

If disabled deserilizer loose lock with one error.

Is this true?
Is the Lock loose when "Link Error Count Enable" bit is 0:Disable?
I guess that if this function is disablee, the Lock is not loose.

Best Regards,
Ryuji Asaka

  • Hello,

    I'm looking forward to the reply.
    Also, I have the additional question about "Link Error Count" address 0x41.

    Is the lock latched off when the link error count is larger than link error count threshold which we set this by the address 0x41 bit 3:0 ?
    Or the Lock is re-established after removing the error?

    Best Regards,
    Ryuji Asaka
  • Asaka-san,

    Register 0x41 default is 0x03. When bit [4] set 1, Deserializer looses LOCK when Link Error Count reaches "3". When bit [4] set 0, Deserializer looses LOCK when Link Error Count reaches "1".

    Register 0x41 is Link Error Count function. If you see Unlock, setting higher Link Error count may solve the Unlock. Also there may be other cause of Unlock.

    Best Regards,

    Sugiura

  • Hello Sugiura san,

    Thank you for the reply.
    I would like to know the Link Error Count behavior.
    The customer has a noise application test.
    Then the customer use the Link Error count for checking the signal quality instead of BIST error count.

    In the customer , the Lock is not latched off when the device counting over Link Error threshold.
    The Lock is re-established remove the error.
    Is this behavior correct?

    Regarding PASS pin on BIST mode, PASS pin is latcheed off after BIST OFF if the device detect the error.
    I understood that the Link Error Count is not count the Link Error. It is Only Threshold.
    However, I think that we can use the Link Error Count as PASS/BIST Error count.

    Best Regards,
    Ryuji Asaka