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TLK110 RMII receive clock mode

user1496439
Prodigy 30 points
Other Parts Discussed in Thread: TLK110

I have a design that uses the TLK110's RMII receive clock mode and it is not working.

The MCU is an STM32F407 that is being clocked by an 8 MHz crystal in order to generate a system clock of 160 MHz.

The PHY is being clocked by a 50 MHz oscillator, connected to XI (pin 34) only with XO left floating. MII_MODE (pin 39) is being pulled high in order to activate RMII mode. SW_STRAP (pin 21) is being pulled low to activate software strapping mode. RX_CLK (pin 38) is connected to PA1 (the ETH_RMII_REF_CLK pin) on the MCU.

The firmware performs a hardware reset of the PHY and then polls PHYIDR1 (register address 0x2) until the proper response is received. Bit 0 of SWSCR2 (address 0xA) is then set to activate the RMII receive clock mode. Afterwards, bit 15 of SWSCR1 (address 0x9) is written to signal the end of the strap configuration.

The overall board does establish a link when an Ethernet cable is attached, but a connection to the on-board web server cannot be established. I have used this firmware with an evaluation board (pin configurations changed accordingly) and it works so I don't think the rest of the firmware is an issue, keeping in mind that the PHY on the evaluation board is different.

I can see 50 MHz signals on XI of the PHY and PA1 of the MCU using the oscilloscope so I am not sure what the problem is right now. Does anyone have any suggestions? Should I just not be using this RMII receive clock mode?

  • 0
    Prodigy 30 points
    I just realized that the RMII receive clock mode documentation makes no mention of how transmit data is synchronized. Using an oscilloscope, I have measured an approximately 7 ns delay between XI and RX_CLK. Could this combination be the source of the problem? Have I just been using this receive clock mode incorrectly?
  • 0 in reply to user1496439
    TI__Mastermind 23675 points
    Hi,

    For RMII mode you need to ensure that the MAC and the PHY are operating off of the same reference clock. The XI pin of the TLK110 must be the same clock that is used by the MAC. This clock must be 50MHz in RMII mode and is used to clock data in properly.

    Do you have a schematic to share?

    Kind regards,
    Ross
  • 0 in reply to Ross Pimentel
    Prodigy 30 points
    I'm afraid I do not have a schematic to share at the moment but I will do my best to explain the relevant details. The clock is connected to the XI pin of the PHY only. The MAC reference clock pin is connected to the RX_CLK pin of the PHY. Bit 0 of the SWSCR2 PHY register is set so that a clock signal will be generated on the RX_CLK pin. RMII mode is being used.

    I was under the impression that this would provide similar functionality to the REF_CLK Out Mode on the LAN8720 PHY, which I have tested successfully. Perhaps I cannot do this for this case?