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Two DS80PCI810 in series, failing to get PCI Gen3 beyond x1 link

David Bayer
Prodigy 190 points
Other Parts Discussed in Thread: DS80PCI810

Hello,

We have the following setup:  x8 wide PCIe Gen 3.0 connection as follows

PLX9733 -> connector & PCB -> DS80PCI810 -> connector & PCB & external 3 ft cable -> connector & PCB -> DS80PCI810 -> connector & PCB -> PLX9797.

I have successfully set this path up for x8 Gen 1,  x8 Gen 2.   When I try to get Gen 3 working, I can only succeed if I limit the width to x1 only (by powering down the other 7 lanes).

When I try to go to x2 wide (or wider), the PLX Receiver Error and Recovery State counter registers quickly reach their maximum values.

I have tried a wide variety of settings for eq, VOD, and VOD_DB and cannot eliminate these errors.

Are there recommended values for running two DS80PCI810's in series?   Or, are there any reserved register settings that I can use to disable the EQ and just pass through the input for debugging in order to eliminate one of the '810s?

Thanks

  • 0
    TI__Mastermind 43795 points

    Hi David,

    It is possible to get two DS80PCI810's connected in series working to run at 8 Gbps. However, there are many variables in such a system.  Can you send me the best settings you have found for the DS80PCI810 and the PLX9733 devices.  I will need to know what TX FIR settings (PCIe TX Preset) that the PLX9733 is using.

    It will also be very benefical to understand the approximate channel losses for all segments in the link.

    Something as simple as

    PLX9733 -> xx dB @ 4GHz -> DS80PCI810 -> PCB segment: x dB @ 4 GHz, Cable: x dB @ 4 GHz, PCB segment: x dB @ 4 GHz -> DS80PCI810 -> xx dB @ 4 GHz -> PLX9797

    Thanks and Regards,

    Lee 

  • 0 in reply to Lee Sledjeski
    Prodigy 190 points

    Hi Lee,

    Here is the insertion loss of the path @ 4GHz:

    TX:

    9733 -> -4dB -> '810 #1  -> -13dB -> '810 #2 -> -4.3dB -> 9797

    RX:

    9733 <- -4dB <- '810 #4 <- -13dB <- '810 #3 <- -4.3dB <- 9797

    '810 Settings  (EQ, VOD, VOD_DB) - they are the same for each lane;  

    Settings for '810 #1:   0x2D 0xAE 0x01

    Settings for '810 #2:   0x2D 0xAE 0x00

    Settings for '810 #3:   0x2C 0xAE 0x00

    Settings for '810 #4:   0x2E 0xAE 0x01

    The Trained Coefficients of the 9733 vary widely between lanes.  

    Precursor Coefficient  from 0x00 to 0x08

    Main Cursor Coefficient from 0x37 to 0x3C

    Postcursor Coefficient from 0x00 to 0x03

            9733 Port 4  Lane 0 Trained Coefficients   0x4BBC =    05 39 01

            9733 Port 4  Lane 1 Trained Coefficients   0x4BBC =    06 39 00

            9733 Port 4  Lane 2 Trained Coefficients   0x4BBC =    08 37 00

            9733 Port 4  Lane 3 Trained Coefficients   0x4BBC =    00 3c 03

     

    The trained coefficients of the 9797 vary widely between lanes.

    Precursor Coefficient  from 0x00 to 0x10

    Main Cursor Coefficient from 0x2f to 0x3a

    Postcursor Coefficient from 0x00 to 0x05

            9797 Port 12 Lane 0 Trained Coefficients   0xCBBC =   00 3a 05

            9797 Port 12 Lane 1 Trained Coefficients   0xCBBC =   04 37 04

            9797 Port 12 Lane 2 Trained Coefficients   0xCBBC =   0b 31 03

            9797 Port 12 Lane 3 Trained Coefficients   0xCBBC =   10 2f 00

  • 0 in reply to David Bayer
    TI__Mastermind 29655 points

    Hi David,

    It looks like for the four DS80PCI810s, you are using less than the maximum value of EQ, and I am wondering if adding more boost could help in your situation. The DS80PCI810 only utilizes the gain settings applied to the two LSBs, and the other 6 bits in the register are ignored. Therefore,  I am reading your settings as the following:

    DS80PCI810 #1: EQ = 0x01, VOD = 110'b, VOD_DB = 001'b

    DS80PCI810 #2: EQ = 0x01, VOD = 110'b, VOD_DB = 000'b

    DS80PCI810 #3: EQ = 0x00, VOD = 110'b, VOD_DB = 000'b

    DS80PCI810 #4: EQ = 0x02, VOD = 110'b, VOD_DB = 001'b

    In all these cases, I would set VOD_DB = 000'b, and I would try starting with a setting of DS80PCI810 #1 and #3 EQ = 0x00, since these redrivers are only receiving -4 dB of loss. Meanwhile, I would increase the EQ to the maximum for DS80PCI810 #2 and #4 EQ = 0x03, since they come after the -13 dB loss and still need to drive -4 dB after the cable.

    Thanks for the trained coefficient values. While this is helpful to know, we are actually more interested in the chosen Tx preset used by the CPU (or PLX switch). This allows us to determine how much signal conditioning is "pre-applied" to the waveform already. This corresponds to the PCIe preset value P0-P10, as referenced in the PCIe specifications below:

    Would you happen to the know which preset value is being used in your system? Common preset values we have seen in systems is P7 and P4.

    Michael