Hello Team,
Could you please tell us how to change the loop bandwidth of the CDR PLL ? Our customer is willing to change it due to their application.
I believe the following register changes the charge pump current of the PLL which could change the loop bandwidth.
- REG 0x0A [6] : IDAC override bit
- REG 0x1C [7:2] : IDAC_PD/FD_CPx
Is there any other register which is effective ?
Best Regards,
Kawai