HD3SS3220 USB MUX

Yorai Shmueli

Prodigy 80 points

Other Parts Discussed in Thread: HD3SS3220

Hi, I'm currently using the HD3SS3220 USB MUX.

No matter the cable orientation, the mux seems not to switch.

I'm using nVIDIA TK1 on board.

The I2C interface is responding and I'm able to switch between DRP/UFP/DFP.

I checked the CC voltage level and it is OK (0.9V or 4.8V).

Also the VBUS_DET showing good voltage level (0.47V).

Please advise.

over 9 years ago

0 Yorai Shmueli over 9 years ago

Prodigy 80 points

HD3SS3220.pdf

0 Yu-Ning Lee over 9 years ago

TI__Intellectual 1990 points

The VBUS_DET must be tied to VBUS not 5V source. The CC controller will not enter unattached state without VBUS_DET removal. VBUS_DET must reflect Type-C VBUS level. please confirm VBUS_DET is tied to Type-C VBUS(or equivalent power supply that reflects the Type-C VBUS status) not 5V supply which is enabled all the time regardless of the USB connection status.

Regarding the schematics, AC coupling capacitors on RX path are not needed. In fact it may cause issues when connected to another USB SS device with AC caps on TX path as the switch would be isolated between AC caps without common mode bias.

0 Yorai Shmueli over 9 years ago in reply to Yu-Ning Lee

Prodigy 80 points

Hi,

Thank you for the reply.

Did you mean the RX path between HD3SS3220 and the nVIDIA chip?

what about the other side? the Caps between HD3SS3220 and the connector?

thanks again,

Yorai

0 Yu-Ning Lee over 9 years ago in reply to Yorai Shmueli

TI__Intellectual 1990 points

Yes. The capacitors shown in the attached.

0 Yorai Shmueli over 9 years ago in reply to Yu-Ning Lee

Prodigy 80 points

Hi,

i connected the VBUS as you recommended.

Now, when i reed register 0x09 i can see that the HD3SS3220 device reed the correct CC1 or CC2 orientation, and it is attached.

but the link is steel with USB 2 on one side and USB 3 on the other side.

the DIR output pin doesn't show me high level at any case. (0.089V or 0V).

thanks again,

Yorai

0 Yorai Shmueli over 9 years ago in reply to Yorai Shmueli

Prodigy 80 points

21_USB3.pdf

0 Diego Cortes over 9 years ago in reply to Yorai Shmueli

TI__Mastermind 36085 points

Hello Yorai,

Now seems that the root issue is the layout. DO you have a USB trace of both cases or the layout file for review?

Regards,
Diego.

0 Yorai Shmueli over 9 years ago in reply to Diego Cortes

Prodigy 80 points

Hi,

the layout is pretty similar for both sides, please see attached.

how do i know for sure that the MUX is working and pointing to correct USB traces?

USB3 Layout.pdf

0 Diego Cortes over 9 years ago in reply to Yorai Shmueli

TI__Mastermind 36085 points

Hello Yorai,

As a first approach you can check the DIR terminal and read the I2C register 0x09, bit 9 (0:CC2, 1:CC1-Default ).

Regards,

Diego.

0 Yorai Shmueli over 9 years ago in reply to Diego Cortes

Prodigy 80 points

Hi Diego,

i cheeked the pins a you suggested.

The problem is that the DIR output is connected to a FPGA input for indication.

With 200k pull up the DIR pin level was 0V and 0.089V and the MUX did not work.

After i changed the DIR pull up to 4.75K the pin levels changed to 0.2V and 2.9V and the MUX finally work!

why an output effect device configuration?

thanks,

Yorai

0 Diego Cortes over 9 years ago in reply to Yorai Shmueli

TI__Mastermind 36085 points

Hello Yoari,

The output pull-up does not affect the device's configuration, the DIR pin is an open-drain output and it's output level may be affected by the pull-up, so the FPGA wouldn't be able to detect a change on DIR.

Regards,
Diego.

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HD3SS3220 USB MUX