DP83867 INT/PWDN pin

Ryuuichi machida

Guru 12640 points

Hi,

Let me confirm following thing.

* Could you please tell me buffer type of "INT" function ?

Is it open-drain ?

According to datasheet, it requires pull up to "INT" function. So I guess that this output pin is open-drain.

However, according to ibis model, there is no description about open-drain in "Model_type".

Best regards,

Machida

over 9 years ago

0 Rob Rodrigues over 9 years ago

TI__Mastermind 19780 points

Hi Machida,

The INT pin is an LVCMOS driver, it is not open-drain. We recommend a pull-up on the INT pin to help drive the edge quickly.

If you'd like open-drain operation, you should connect the INT pin to the gate of an external MOSFET.

Best Regards,

0 Ryuuichi machida over 9 years ago in reply to Rob Rodrigues

Guru 12640 points

Hi Rob-san,

Thank you for your reply.
Let me confirm following thing just in case.

* Is there any output pin which is open-drain ?
In my understanding, there is not open-drain pin in this device, but let me comfirm just in case.

Best Regards,
Machida

0 Patrick OFarrell over 9 years ago in reply to Ryuuichi machida

TI__Mastermind 31600 points

Correct. The digital I/Os are LVCMOS I/Os.

Patrick

0 Ryuuichi machida over 9 years ago in reply to Patrick OFarrell

Guru 12640 points

Patrick-san,

Thank you for your reply.
I understood and close this thread.

Best regards,
Machida

0 Ryuuichi machida over 9 years ago in reply to Ryuuichi machida

Guru 12640 points

Patrick-san and Rob-san,

Sorry for going back previous this thread. However, I have additional question.
We re-checked datasheet then, we found following spec.

DC CHARACTERISTICS :
IOZ TRI-STATE Output Current

According to your comment, there is no open-drain pin, so we could not understand why this spec was described.
If you know Which pin this spec is described for, could you please send it me ?

Thanks in advance,
Machida

0 Patrick OFarrell over 9 years ago in reply to Ryuuichi machida

TI__Mastermind 31600 points

The output pins are used as strap inputs. During power up or during a hard reset, the output drivers are disabled so that the strap inputs can be sampled.

Patrick

0 Ryuuichi machida over 9 years ago in reply to Patrick OFarrell

Guru 12640 points

Patrick-san,

I'm sorry I could not understand what you want to say.

Actually, as you said, there are some pins which will become strap input.

Is what you want to say when strap input is enabled against output pin(such as GPIO or RX_X), internal output buffer will become Hiz ?

(I think that you indicate these pins are tri-state buffer not open-drain buffer. )

Best Regards,

Machida

0 Patrick OFarrell over 9 years ago in reply to Ryuuichi machida

TI__Mastermind 31600 points

Machida,

Correct. The output pins are tri-state buffers. When the strap input is enabled, the tri-state buffers will be Hi-Z.

Patrick

0 Ryuuichi machida over 9 years ago in reply to Patrick OFarrell

Guru 12640 points

Patrick-san,

Thank you for your reply.
I understood.

Best Regards,
Machida

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DP83867 INT/PWDN pin