SN65DSI84 clk

NAOKI AOYAMA

Guru 11215 points

Other Parts Discussed in Thread: SN65DSI84

Hello,

Our customer uses the SN65DSI84, has some questions.

1) Could you tell me the skew between the LVDS output A_CLK and B_CLK?

2) How about the current consumption with using the REFCLK?

It is mentioned the ICC on the datasheet Page7. I think that value is

under condition not using the REFCLK.

Regards,

Naoki Aoyama

over 9 years ago

0 Joel Jimenez0 over 9 years ago

TI__Mastermind 18655 points

Hello,

The CLK distribution should be nearly identical between two LVDS interfaces so they are the same between two as the datasheet says. The skew is possible due to other mismatches but should not be greater than 10ps.

I will check if there is any available char data when REFCLK is used as clock source. Please, provide your device setup.

Regards,
Joel

0 NAOKI AOYAMA over 9 years ago in reply to Joel Jimenez0

Guru 11215 points

Hi Joel,

Thank you for your reply.

The customer's setup as follows.
REFCLK : 74.25MHz
for output format is Format2

REFCLK : 74.25MHz multiply by 2 (148.5MHz)
for output format is Format1.

Regards,
Naoki Aoyama

0 NAOKI AOYAMA over 9 years ago in reply to Joel Jimenez0

Guru 11215 points

Hello,

Is there any data about current consumption when use REFCLK and not use REFCLK?

Regards,
Naoki Aoyama

0 Joel Jimenez0 over 9 years ago in reply to NAOKI AOYAMA

TI__Mastermind 18655 points

We are generating the data, I will back to you with the results tomorrow.
Regards,
Joel

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SN65DSI84 clk