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DP83867 "X_I" capacitor divider

Ryuuichi machida
Guru 13020 points


Hi,

I would like you to confirm about capacitor divider in case of CLKIN (not crystal).

According to datasheet, TI recommend to implement 27pF capacitor to both C1 and C2 (Please refer to 10.2.1.2 Clock In (X_I) Recommendation).

However, in this case, I guess that input voltage to "X_I" will become 3.3V or 2.5V divided by 2.

So, could you please confirm why capacitor divider is required ? Which understanding is correct ?

1. To generate 1.8V for "X_I" input.

2. To generate input voltage less than 1.8V for "X_I" input.

If above 1 is correct understanding, can user use same capacitor for C1 and C2 ?

If above 2 is correct understanding, which voltage will be used for "X_I" and "X_O"  (Does voltage for these I/O generate from internal LDO by using VDDIO ?) ?

Best Regards,

Machida