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getting garbage data from DS90UB940 input

Other Parts Discussed in Thread: DS90UB940-Q1

I am working one imx6x CSI MIPI capture with TI DS90UB940-Q1 (http://www.ti.com/product/DS90UB940-Q1), and get no success for a real environment. The following is framework from customer, the resolution from Front HU is 1280x720.

     iMx6x -> DS90UB927q ===(FPD link III)===> DS90UB940 -> iMx6x

         (Front HU target)                                          (Rear HU target)

Current status is:

1. for real connection above, I get frame (start and end of frame interrupt) on the imx6x “Rear HU”, but no valid data;

2. I tested to use internal test pattern from DS90UB940, for same 800x480 but different timing from http://www.ti.com/lit/an/snla132c/snla132c.pdf:

  1) "Table 33. Custom Display Example": works fine with Rear HU capture, and I can see frame perfectly;

  2) "Table 10. Internal Timing Default Values": no good, most time imx6x can not even get clock. A few of time, I could got test pattern, but image jumps horituzontally every a couples of seconds: good positon <> bad positon

I work with freescale, and they suspect it is timing issue between 940 and imx6, but they can not see anything apparately wrong.

Do you have any input from 940 side, to debug this issue?

Thanks,

Dennis

  • FYI, I am using timing "1280x720p @59.94/60 Hz (Format 4)" timing (according to CEA standard/CEA-861-D) as below:
    .pixel_clock_kHz = 74250,
    .hpixels = 1280, .hfp = 110, .hsw = 40, .hbp = 220, // 1650 total
    .vlines = 720, .vfp = 5, .vsw = 5, .vbp = 20, // 750 total
    and problem keeps same.

    BTW, how i can setup one 940 MIPI CSI output to LP11 mode?
  • I suspect 940 did not output proper signal on data lanes: because i try to setup 940 to 2 data lanes only by changing reg#0x6A=0x20, and in imx6 side, i test to use 4 data lanes and imx6 still report to get frames with same garbage content.