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About the setting of XIO3130

Other Parts Discussed in Thread: XIO3130

Hello.

Now I'm designing a board like this.

CPU(ROOT/UpStream) <-> XIO3130 <-> FPGA(EndPoint/DownStream)

(The FPGA has PCIe IP.)

I wanna implement following both direction access.

(A) CPU(Master) -> FPGA(Slave)
(B) FPGA(Master) -> CPU(Slave)

I can access (A) direction already,
But I can't access (B) direction.

When accessing via XIO3130,
Do I need set some setting to XIO3130 for (B) direction access ?
(In my board, the setting for XIO3130 is default setting.)

  • So your FPGA is doing DMA? How exactly do you test whether it works?
  • Hi, Clemens Ladisch.
    Thank you for your reply.

    >So your FPGA is doing DMA?
    Yes.My FPGA is doing DMA.
    I designed DMA Controller in FPGA for it.

    Do I need set some setting when I implement DMAC in FPGA at downstream????

    >How exactly do you test whether it works?
    Just I tried accessing DMAC to PCIe IP.
    According to spec of PCIe IP, if PCIe IP's internal-bus(AHB-Lite Bus) port receives access from internal module(like a DMAC)
    PCIe IP starts PCIe access to Root.

    I could accessed to the PCIe IP correctly through internal bus.
    But when DMAC start to access to PCIe IP through internal-bus,
    PCIe IP's internal-bus port indicates "Wait" state to DMAC
    I can't cancel this state to continue accessing to PCIe IP.
    I thought the reason of this problem is that some problem is occuring on PCIe route.
    So first, I wanna confirm that do I need some setting for using DMAC , or not.
  • The XIO3130 itself does not need any special configuration; the default configuration made by the OS already allows DMA.

    Of course, this assumes that the driver on the host has correctly configured the system for DMA.
  • Hi,Clemens Ladisch

    >XIO3130 itself does not need any special configuration; the default configuration made by the OS already allows DMA.

    >Of course, this assumes that the driver on the host has correctly configured the system for DMA.

    I got it. 

    I  review about this problem from another point of view.

    Thank you for your reply !!

  • As always, thanks for your support Clemens.