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How is the insertion loss specified in Webench interface designer?

sanjay parekh
Prodigy 180 points
Other Parts Discussed in Thread: DS80PCI810, DS80PCI800, DS100BR111, DS80PCI102

Hello Community,

I am trying to model in webench a TX --> Cable --> DS80PCI810 --> RX.  What is confusing is how is the insertion loss number provided?  Do I have to add a -ve sign infront of the loss value?  You can see in the picture attached, this doesn't produce any good output.  But what I see in the app note is that losses of upto -40db are corrected by this part.  So I am not sure what I'm missing in my sim?

I have been told that this part can get upto 10meter on a miniSAS HD cable over Gen 3 speeds.  Looking at the miniSAS HD cable spec, I see that it has about -11dB insertion loss at 4GHz over 5m.  And the PCIe Addin card loss budget is about 13.5dB.  So 25dB doesn't seem that far fetched number.


I should mention, that I am not sure if I need to enter a negative value in the insertion loss field because the example or default value is given as a positive number and the graph looks correct as well with the positive value.

  • 0
    Prodigy 180 points
    Looks like it doesn't matter negative or positive, the channel waveform, doesn't change the reflects the correct value. So I'm still confused. I am expecting too much from this part?
    Thank you.
    Best regards,
    Sanjay
  • 0
    TI__Mastermind 43795 points

    Hi Sanjay,

    The DS80PCI810 is a linear equalizer.  To keep the entire datapath linear the total gain or boost is somewhat less than other repeater style products.  The DS80PCI810 is designed to compensate for only part of the total channel loss.  The system Tx FIR and system receiver CTLE/DFE will compensate the rest.

    All by itself the DS80PCI810 is capable to compensate for ~ 10 dB loss at 4 GHz.  

    Let me know if you are still having trouble getting results on WEBENCH.  I can post some setup tips and pictures.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 180 points

    Thank you for the clarification Lee.  I did manage to get the DS80PCI800 sim working in the Webench. 

  • 0
    TI__Mastermind 43795 points

    Hi Sanjay,

    Here is a WEBENCH setup using the DS80PCI810.  Please note that the DS80PCI810 all by itself is limited to ~ 10 dB of CTLE gain.  For PCI Express the system TX and RX will help to compensate the signal attenuation as well.

    For the PCIe Tx I am using a waveform which approximates a PCI Express P7 preset

    Generic Tx:  Slew = 40ps, Pre = -8, Pst1 = -16, Swing = 1000

    For the DS80PCI810 I am using a BST = 3 (maximum) and VOD = 4

    For the receiver I am using a DS100BR111 configured to provide a CTLE gain of ~ 6 dB at 4 GHZ.  This is the minimum specified for PCIe Gen 3 devices.

    DS100BR111: EQ_level = 1 (Range 0-15)  approximate gain = 6 dB, Limit = 0

    I have attached the simulation setup and final waveform.  To create the channels you do not need a "-" sign for attenuation.  Set frequency to 4 GHz for PCIe. Set reflection = Low.  When you click apply, the attenuation graph will plot on the right.

    The waveforms below are TX_OUT, SC_IN, and OUT_PT2

  • 0 in reply to Lee Sledjeski
    Prodigy 180 points

    Lee,

    Thank you for showing me this example.  It helped provide more insight.  I am trying to figure if the scheme below will work for me.

    1. Based on your example I modelled the Generic TX as - Slew: 10ps; Pre:-8; Post:-16,Swing:1000.  How realistic is this generic model for a host PCIe transmitter?

    2. For RX Sigcon, I fixed the limit:1; DE Level:7 i.e. -12dB.  I set the TX EQ Level and TX VOD to explore. 

    I still am not able to find a good eye with this combination to make the setup work.  Thank you in advance for any insights.

  • 0 in reply to sanjay parekh
    TI__Mastermind 43795 points

    Sanjay,

    The total channel loss of 38 dB is a high level of attenuation. 

    I can get eye diagrams, but they are not really good looking - it is at the edge of the device capability.

    I made a few changes to get a better eye opening.

    Tx - 30 dB - DS80PCI800 - 8 dB - Rx

    I changed several settings

    Tx edge rate to 40ps (more realistic)

    DS80PCI800 EQ=5, Limit=1, VOD=5, DE=2

    Rx - changed from Ideal to DS80PCI102 (to use CTLE like PCI Express)

    Rx EQ=1, Limit=0

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 180 points

    Thank you Lee.

    The RX in my setup is an Altera Arria 10 FPGA with CTLE so this makes sense.   I am driving 7m of miniSAS HD cable + add-in card which is 24AWG cable.  Am I being too conservative with the loss of 34dB?    

    In the TX setup I see that the values need to be specified in percentage.  So if I want to specify a PCIe host with preshoot of 3.5db, then I enter roughly 50% in the pre field?

    Thank you.
    Best regards,

    Sanjay

  • 0 in reply to sanjay parekh
    TI__Mastermind 43795 points

    Hi Sanjay,

    To get the full nominal PCI Express Tx Preset you can use the attached chart.  I typically reduce the percentages by 20% to account for some package loss in the driver which is not included in the Generic Tx model.

    Regards,

    Lee