Hi,
Customer is considering DS250DF810. And they have some questions.Please let me know the details.
Q1
Are there time constraints between power up VDD and input 25MHz at CLK_CAL_IN?
Before power up VDD, could CLK_CAL_IN accept 25MHz?
Q2
Could the unused pins(RX*P,RX*N,TX*P,TX*N) be open?
Best Regards,
Kato