Hi,
I have a few question about DP83867 ether phy.
My customer are testing EMC emission test of their custom board.
On their board, DP83867 are connected to AM335x via RGMII.
When ethernet are communicating with 1Gbps, there are peak noise which fundamental frequency is 125MHz.
They are thinking about the workaround for this noise and asking me the method.
I found TI design(TIDA-00204) and there are layout plots.
www.ti.com/.../tidu832a.pdf
From this layout plots, I guess the wiring between AM335x-DP83867 are stripline.
Why stripline was used? Is it result of EMC consideration?
If "stripline" can be workaround for the above noise,
should I route all RGMII signals(Data/CLK/TxEN/RXDV) with stripline to have best effect?
Or route some of the RGMII signals with stripline will be fine?
best regards,
g.f.
