TFP401A Power supply Ferrite Beads

Hello Elias, Sorry for not making it clear. Let me try again.

If FBs are not there, power pins can be directly connected to the 3.3V power plane through vias.
But with FBs, it goes like power plane to FB through a via and then from FB to all the respective power pins. So with FBs there will be long power traces going from FB to each power pin. Is this a better approach?

Thanks

-M

Yes,

The FB is the recommended approach, it is very important to minimize as much as possible the supply noise from one power rail to another one.

Regards

Thanks Elias. Here is the ODCK output captured with DSO. Not sure why it is distorted. No HSYNC, VSYNC, DE signals from TFP. SCDT is low.  Also attached the HDMI clock+ and clock-  signals captured with normal (not differential) oscilloscope when input was 800x480@66Hz. ODCK output attached was when input was 1024x600.

What could be the problem? Schematic is reviewed by TI and there are no issues with it. Verified all pinouts multiple times.  PCB is impedance controlled 4 layer board with GND and 3.3V planes. TMDS lines are matched for length. Very rarely (1 or 2 out of 25-30 tests) SCDT LED blinks or HSYNC appears for few seconds. Otherwise no transitions from  HSYNC, VSYNC, DE. We cross verified the video source and EDID with another TFP401A board (from adafruit) and that's working fine. So no issue with video source or EDID.