Hello,
My customer has a question about LMH1983.
[Background]
My customer want to use LMH1983 for 12G SDI with Xilinx Kintex Ultrascale FPGA.
Their requirements as follows.
- Input : FVH from LMH1981 (Sync Separator)
- Outputs : Video Clock (148.5MHz, 148.5/1.001M : LVDS), Audio Clock doesn't use.
I read the following post.
Title : 12G Config. I/O
I understood that LMH1983 can be used for 12G SDI with Arria FPGAs and Xilinx FPGAs.
However, I think the performance of LMH1983 does not meet the Kintex ultrascale FPGA specifications.
Kintex ultrascale specifications as follows.
Please refer to page 48 Table 52 of "ds892-kintex-ultrascale-data-sheet".
When it's normalized by 148.5MHz about QPLLrefclkmask, it's as follows.
10kHz offset : -114.5dBc/Hz
100kHz offset : -130.5dBc/Hz
1MHz offset : -136.5dBc/Hz
I plotted the phase noise mask in Figure 4 of LMH1983 datasheet.
[Q]
I think the performance of LMH1983 (PLL2 & PLL3) does not meet the Kintex ultrascale FPGA specifications.
How do you think ?
My plan is as follows.
LMH1981 -> LMH1983 (only use PLL1 for Genlock Jitter cleaner) -> LMK03328 or LMK0482xB or LMK0480xB or LMK03806B (Generate Video Clock)
How do you think ?
Do you have any good ideas for this matter ?
Best Regards,
Hiroshi Katsunaga
