PCA9515b - the right place in signal path

Hello Eyall,

Do you have a schematic or block level diagram to reference?  Selecting the location of the buffer/repeater is dependent on a variety of factors.  Generally speaking you want to distribute the capacitive load on the i2c bus based on the drive of the master and that of the repeater/buffer.  Lets assume the master has the same drive strength as the PCA9515B for the sake if simplicity.  If that is the case, you will want to try and distribute the capacitive load evenly between the two.  It that isn't the case than you will want to proportion the capacitance load such that the stronger drive strength take more of the capacitive load. 

Capacitive loads depend on a variety of things.  The ICs have capacitance and the trace have capacitance.  Pin capacitance is usually defined pretty well but the trace capacitance will be a function of trace width, length, dielectric strength, and the distance from the trace to the ground path.  If you are doing the layout some tools can extract the parasitic's.  If you give information about your system I can help give you a ball park figure.

Sincerely,

-Francis Houde

Heelo Francis,

Thank you for brief answer.

The master is PIC18F45K50 which the following chips connected to it via I2C are: HDC1000, OPT3001, OPT3001, TSL2561, TSL2561, TMP006,SHT30, LSM9DS1,ADXL345,SHT30,TMP102,HDC1000,MS8607,TMP006,TCA9544,TCA9544.

There are two PCBs, the first one accomodate: HDC1000, OPT3001, OPT3001, TSL2561, TSL2561, TMP006,SHT30.

The second PCB accomodate: LSM9DS1,ADXL345,SHT30,TMP102,HDC1000,MS8607,TMP006,TCA9544,TCA9544

I thought to be on the safe side and to put PCA9515 for the first PCB gruop and another one for the second PCB group.

The size of the first PCB is approx 40mm x 40mm and it connect to the second one by 10cm cable. the size of the second PCB is approx 20mm x 20mm, 

The problem is that i'm before layout stage so i cannot determine any detail regard the capacitance of the traces.

Thank you.

Hello Eyall,

That is quite an interesting set of sensors you are interfacing with.  I had a few questions more to ask about this specifics of your application.  What voltages are you planning to operate at?  What data rate are you trying to achieve(200kHz?400kHz?1MHz?)?  Do you have a power budget?  If so, what is that?  Do you have the board stack-up defined (4 layer? ground on bottom or layer 2???)?  If you do then you can create a rule of thumb for capacitance/unit length for a given trace width.  That will give you ball park numbers.   It appears that the boards are quite small and on potential path for dealing with the long length ,might be using the cables.  Do you have specifications for the cable you are trying to use?  specifically capacitance/ft?  

If the cable is the majority of your capacitance than you may want to consider P82B96/715 where it works in pairs where the cable is buffered on one board at the end of the I2C chain before it connects  through the long cable to the second board.

This might be over kill in your application, especially if you have a battery application because these parts have very strong drivers.  You could also consider using the TCA9617B which allows for using more powerful pull-ups.  

Can you tell me more about your application?  I would like to know more about your design and project goals.  If any of the information is sensitive then feel free to contact me directly with specifics.  

-Sincerely

Francis Houde

Hello Francis,

I can use 100Khz or 400Khz data rate, the stackup is 6 layers, it is 3.3v powered by battery.

The flat cable is like : www.digikey.com/.../en , but idont find any capacitance/ft parameter in spec.

How can we contact directly?