• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 1207 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65HVD251-Q1 Startup with Dominant status

Randy Wang
Intellectual 1705 points

Other Parts Discussed in Thread: SN65HVD251-Q1

Hi Team

  My customer is using SN65HVD251-Q1 for EV application, and the output shows dominant status when startup. 

  Change to NXP TJA1051 can solve this issue, so I'm wondering how's the output status when SN65HVD251-Q1 powered up. 

  Thanks. 

  • 0
    TI__Guru 62920 points
    Hi Randy,

    This device is designed so that the bus pins remain in a high-impedance state during power-up, so I wouldn't expect a dominant glitch to occur. Do you think you could capture the VCC, D, CANH, and CANL signals on an oscilloscope when the device is powering up and outputting the dominant level so that we can better understand what is happening?

    Thank you,
    Max
  • 0 in reply to Miguel Robertson
    TI__Intellectual 1705 points

    Hi Max

      I re-tested the waveform, our device is working good behavior, however, NXP TJA1057 seems has output delay when startup, it means when the device powered up, the input D is low, so 251 is dominant, but TJA1057 is recessive.

      I'm wondering did you ever heard this kind of feature? thanks. 

  • 0 in reply to Randy Wang
    TI__Guru 62920 points
    Randy,

    I think this most likely just a difference in start-up times, not an intentional feature in the device. (I haven't heard of this being a concern at other customers.) You just need to make sure that the TXD line is not driven low when the transceiver starts up. Installing a pull-up resistor to VCC may help to accomplish this.

    Max