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DP159 Intra pair skew failing

Håvar Beyrer
Prodigy 20 points
Other Parts Discussed in Thread: SN75DP159

Hi,

On a number of products we are using the SN75DP159 as a HDMI Tx retimer.

When running HDMI 2.0 compliance test all products fail the intra-pair skew (P vs. N) compliance part with approximate the same value.

Measured skew is approximate 30-40 ps while the requirement states about 24 ps (0.15 * Tbit).

All other compliance test passes with good margin.

Our layout is without any skew between the DP159 outputs and the connector hence the layout cannot cause such large skew violation.

We have measured same values for devices with package/date codes 5c and 61.

We have also observed from the measurements (single-ended) that the negative signal output seems to be shiftet slightly lower than the positive signal. This shift will offsett the crosspoint and possibly be interpreted as a skew-fail by the compliance test setup.

With regards to these observations we have a few questions? 

- How is the correlation between TMDS output pins and internal termination and/or supply pins in the device? 

- Can any external signals or supplies cause a shift in the pos/neg TMDS output levels?

- Is it possible to get the compliance test report for the device?

- And is the compliance test performed on the EVM or on another implementation?

Best regards

Håvar Beyrer

  • 0
    TI__Mastermind 23815 points
    Hi Havar,

    You could improve skew performance by setting pre_sel = low in pin strap mode.
    I will provide HDMI2.0 test report by email, it was run on EVM.

    To improve intra-pair skew performance first try pre_sel=low
    If it still fails try the following:
    Use a smaller Rvsadj, here be careful because a very small resistor may produce failures in Vswing and min Vl.
    Try a faster slew rate
    Try adding common mode chokes

    Regards
  • 0 in reply to Moises Garcia
    Prodigy 20 points

    Hi,

    Have the test report been sent yet? I do not seem to have received it.

    Also: changig pre_sel settings did not help - it did more seem to worsen the issue in the range of 6-10 ps.

    We have also noticed that the skew is worst on the clock signal and then reduced per data lane (hence clock fails significantly, D0 fails slightly, D1 passes slightly and D2 passes with margin).

    The device is running with fastest slew-rate.

    We are currently using 6.98 kohm as Rvsadj but will adjust to check performance (need to wait for a Tek scope sw fix first).

    Regards

    Håvar

  • 0 in reply to Håvar Beyrer
    TI__Mastermind 23815 points

    Hi Let's handle this issue by email.

    Regards