Dear Sirs
In INTEL Apex Creek circuit (TB3 End point) that used ESD protect (D35) on Type-C Vbus.
Currently our product reference INTEL Apex Creek circuit.
But on TI TPS65983 datasheet recommend to use Schottky Diode on Vbus.
Could you please help to confirm with TI, which one is correct?
BRS
Nat
Dear Rahul
Thank you.
Beside AZ4024-02S ESD implementation, does TI still require to have Schottky to protect the silicon? Or are Intel Reference Designs ok with only ESD protections?
Please explain and provide suggestion for your silicon. In datasheet, TI specifically asking a current surge protection for TI silicon during the sudden disconnects cable event. IT concerns that the large GND current might strike into TI’s GND pins and suggesting Schottky diode. This TI suggestion is not about the ESD zapping events. In Intel Reference Designs, the AZ4024-02S ESD implementation is providing a current path to GND, for the unwanted ESD zapping on VBUS. These surge voltages are 2kV, 4kV, 6kV, or 8kV and their discharge currents can be up high 30Amp (however the Ipeak risetime is very fast, within 1ns.)
BRS
Nat
