Hi team,
would you please help with below two questions about TLK10232 from my customer Moore? thanks.
1. Loop back
Does TLK10232 have a LS loop back mode? My FPGA send 4 lanes of PRBS code to LS port of TLK10232. And I want TLK10232 just send back what it received.
What DEEP REMOTE LPBK mode and SHALLOW LOCAL LPBK mean? Where are no more explanations on those in datasheet.
2. Verify PRBS-7
I programed my FPGA to send PRBS-7 to 4 lanes of LS port of TLK10232.
The address 0x1E.15 is read out 0x8144, when address 0x1E.0C is set to 0x0370, 0x1370, 0x2370 and 0x3370, which means all 4 LS channel lanes sync status has been set.
And I set address 0x1E.0B to 0x0DD0, which means TLK10232 verifies PRBS-7 pattern on LS input and sends PRBS-7 pattern on LS output.
However, address 0x1E.11~0x1E.14 are read out many times and the value is always 0xFFFF. Does this mean that TLK10232 can’t receive FPGA normally?
What else I can do to figure the problem?
Kevin