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SN75DP159 operation timing question



Hi Team,

my customer has question regarding to SN75DP159 operation timing at data sheet page 25, figure 22 power up timing, they want to know whether the VCC rising time can be first, then VDD is second that follow by VCC? If the answer is yes, then the page 26, table 1 shown the td1 timing is VDD stable before VCC at min: 0us ~ 200us. These two conditions are confused. Please help to clarify. Also, in customer case, the timing of VCC and VDD different is about 1ms, will this cause any device side effect? Thanks.

Regards,

Arthur

  • Hi Arthur,

    It seems we missed to updated the table, having updated figure 22 the idea is to show it doesn't matter if Vcc is stable before Vdd and maximum td1 shouldn't matter.
    The condition you must take care of is td2, wait at least 100us after Vcc and Vdd are stable to remove low level from OE.

    Regards