Q1:  My customer set DF410 in SMBUS master mode and read its initial configuration from an external EEPROM  when power-up,  and they want to do CDR Reset operation before normal work.  Whether DS100DF100 support it?  if so,  how to do the configuration?

You will need to wait for the Master Mode configuration to finish before you can perform Slave Mode register write operations such as CDR reset

Q2:  On page 15 of DS100DF410,  Figure 5,  the address pin (A0, A1, A2) of EEPROM,   it says that One or both of these lines should float for an EEPROM larger than 256 bytes.  What's the reason why we need float these pin?   But in the DF410EVM schematic,  the EEPROM address pins are connected to GND.  More detial information,  on page 38 of DF410EVM document (snlu126c.pdf),  RN2, RN3-EEPROM_GND_A0/1/2

You may ty to ground for setting of 0. Rwefer to page 16 of datasheet for the settings of ADDR pins and corresponding Slave Address

Q3:  in DS100DF410 datasheet,  page 16, line 10,  it says that  To produce the write address for the SMBus, the seven-bit address is Left-shifted by on bit.  But based on the data in table 2,  it seems that Right-shifted, not Left-shifted.  Can you confirm it?

Let's take the example of 0x4e. Its 8-bit binary value is 0100 1110. To obtain the seven bit address of 0x27 you need to use the first seven bits going from left to right. When you do that you obtain 010 0111 or 0x27.

Q4:  Can you send me a timing wave of DF410 reading  in SMBus master mode when power-up for reference, based on DS100DF410EVM?

Please provide an email address, and I can direct message you typical data I have available

Cordially,

Rodrigo Natal

DPS Applications Engineer