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TPS65982EVM New Firmware with Multiple Configurations

Jonathan Ritter
Prodigy 20 points
Other Parts Discussed in Thread: TPS65982, TPS65982-EVM, TPS6598X-CONFIG

Hi,

I am trying to create firmware that utilizes the DIP switches for multiple configurations, much like the preloaded firmware for this device does, using the Application Customization Tool. I found the TPS65982_appConfigGpio_2_10.tpl template and have been successful at programming the board to have two configurations utilizing Bit [B0] on S1. I am wondering how I would go about programming the other switches, Bits [B1] and [B2] connected to DEBUG_3 and DEBUG_4 on S1, so that I could have up to 8 configurations.

Thanks in advance,

Jon

  • 0
    TI__Mastermind 30280 points

    Jon,

    Good idea! This is a cool new concept that the new features unlocks and I'm excited that someone has discovered this capability.

    There is a minor difference between the special TPS65982-EVM FW that comes pre-installed on the Flash vs. a custom configuration you create using the "TPS65982_appConfigGpio_2_10.tpl" template.

    The difference is minor, but the effect is major and creates a fundamental distinction:

    • The pre-intalled EVM FWchecks the Switch position (GPIO Pin level) status as soon as Application Code (APP Mode) begins executing to re-configure the TPS6598X FW from the default settings
      • This special FW allows the Switches to be combined as a Truth Table, so 3 pins = 3 bits = 8 Config ID's
      • The default settings are very basic but are never observed by the user
    • The GPIO-Triggered App Config FWis using the traditional edge-triggered input detection and each GPIO Input mapped for this purpose is treated independently
      • The Shared Device Settings (default) are always active when the Application Code starts executing
      • If a GPIO is High at power-on, this will not result in the GPIOx Hi App Config settings being loaded (and vice versa for GPIOs Low at Power-On)
      • After BOOT is complete and APP mode is entered, any GPIO pin that changes logic level (0 to 1, or 1 to 0) will load a new App Config set
      • If multiple GPIOs change state, the last one to change state will be the active Config set
      • As a result, the GPIO-Triggered App Config FW is limited to 7 Configuration sets
        • Shared Device Settings + 3 GPIOs * 2 Logic Levels = 7

    If you want to test this capability, you only need to make the following changes:

    1. General Settings - Change # of Config Sets in template from 2 to 6
    2. General Settings - Re-name the Config Sets to help map GPIO pins to Events
    3. Shared Device Settings, GPIO Event Map - Re-map GPIO Events to the desired pins (DEBUG4 = GPIO12, DEBUG3 = GPIO13)
    4. GPIO1 Lo, GPIO1 Hi, and New 0x3, 0x4, 0x5, 0x6 Settings - Adjust Registers affected by loading App Config Sets 3, 4, 5, 6
    5. Shared Device Settings, Misc. Config Settings - Add up to 2 CMDs that will be executed when Sets 3, 4, 5, 6 are loaded

    Screen shots of me starting to make these changes are pasted below for your convenience:

  • 0 in reply to Brian Berner
    Prodigy 20 points
    Hey Brian,

    Thanks for the instructions. It worked well and is already up and running.

    The only thing I noticed is that when the board is set as a UFP and is plugged into a charger, the initial Tx Sink Capabilities seem to correspond to the capabilities of DEBUG_4, not the Shared Device Settings as you mentioned. For my purposes that is ok, but I figured I would mention it.

    Thanks again,
    Jon
  • 0 in reply to Jonathan Ritter
    TI__Mastermind 30280 points

    Jon,

    It seems that when you plug it in to a charger so that the board is in Dead Battery Mode (UFP/Sink), then the TPS65982 will boot first from VBUS and provide power to LDO_3V3, but the initial voltage on the GPIO pins may be changing slightly due to the SPI lines toggling.

    I'm assuming that in your setup, the DEBUG4 switch was pushed to the right and GPIO1, DEBUG3 were pushed to the left.

    If the DEBUG4 line toggled or glitched at all during the time when Application code started executing, this would be seen as a transition from Low-to-High. Since the GPIO lines are routed all over the board due to size constraints, there is a lot of room for coupling from other signals on these lines.

    A PCB routed for your application would probably be more careful to route these GPIO traces.

    My recommendation would be that you try to Boot the EVM with all of the GPIO Switches in the OFF (Left) position, then toggle them ON/OFF as needed to see the difference in configuration in real-time.

    Note that every time your Sink Capabilities change due to re-loading a new config set, you will need to execute the "GSrC" capabilities PD Task internally (CMD3 in the TPS6598X-CONFIG Tool, Misc Configurations paga) to re-negotiate for a different PD contract (Voltage/Current).

  • 0 in reply to Brian Berner
    Prodigy 80 points

    I find the wording you use in the Application Configuration Tool (now the 'Snapshot Tool')  confusing and misleading.

    See attachment.

    --- Graham

    ==